1. Field of the Invention
This invention generally relates to semiconductor wafer processing systems, and more particularly to methods and associated apparatus for transporting and processing semiconductor wafers.
2. Description of the Background Art
Semiconductor devices are fabricated using specialized wafer processing systems, which typically have several modules for performing various operations on a semiconductor wafer. FIG. 1A shows a schematic diagram of an exemplary wafer processing system 100 in the prior art. System 100 has several modules including modules 101-107. System 100 further includes a computer 121 and a data acquisition and control system 122 for controlling various control elements 123 (e.g., valves, relays, robots, gates, sensors, heaters, motors, gas channels etc.) utilized in the modules of system 100. A robot 120 in a transfer module 107 is employed to move wafers from one module to another. The movement and processing of wafers are performed in accordance with a list of steps, commonly referred to as a process recipe, which run on computer 121.
The operation of system 100 is now described using process recipe 108 shown in FIG. 1B as an example. A wafer cassette containing several wafers is loaded in a cassette station module 101. Robot 120 picks up a wafer from the wafer cassette and moves the wafer into aligner module 103 (recipe 108, step 109). In aligner 103, the physical orientation of the wafer is adjusted prior to the wafer""s subsequent movement to other modules. Thereafter, the wafer is transferred to a bake station module 104 (recipe 108, step 110), where the wafer is pre-heated prior to being placed in a CVD process module 105. In CVD process module 105, a film of processing material is deposited on the wafer (recipe 108, step 111). System 100 can also accommodate other types of process modules including physical vapor deposition, etching, evaporation, and electro-deposition modules to name a few. Because newly processed wafers can reach temperatures that are high enough to melt a wafer cassette, the wafer coming out of CVD process module 105 is first cooled in a cooling station module 102 (recipe 108, step 112), before it is returned to its wafer cassette. The just described steps are repeated for all wafers in cassette station 101.
Recipe 201 shown in FIG. 2 is similar to recipe 108 except for the use of a parallel step in step 204. A parallel step identifies two or more modules that can be alternatively used. In step 204, the wafer can be processed in either CVD process module 105 or CVD process module 106 whichever is available. As used in this disclosure, the term xe2x80x9cmodulexe2x80x9d includes a module identified in a regular step and any one of the modules identified in a parallel step.
Each step in a recipe invokes an associated control program for directing the operation of the listed module. Using recipe 108 as an example, a control program for directing an aligner to adjust the orientation of the wafer is invoked in step 109. As another example, a control program for directing a process module to perform deposition steps on the wafer is invoked in step 111. In wafer processing system 100 shown in FIG. 1A, such control programs run on computer 121, and direct control elements 123 via data acquisition and control system 122. To meet specific process requirements, each control program accepts parameters, such as temperature for the heating elements of bake station 104 or flow rates for the gas channels of CVD process module 105. It is to be noted that control programs, in general, are well known.
In some situations, the processing of wafers in system 100 has to be abruptly terminated. For example, if the computer controlling system 100 encounters an irrecoverable error while running a recipe, all wafers currently in system 100 may have to be recalled back to their cassettes regardless of whether the wafers have been processed in a CVD process module. This allows a maintenance person to troubleshoot system 100 without risk of destroying the wafers. The removal of a wafer from a wafer processing system is also known as a wafer purge.
A wafer reload is the reverse of a wafer purge. During a reload, purged wafers are placed back to their original location prior to the purge to continue their processing. Wafer reload and wafer purge are examples of non-recipe tasks. Non-recipe tasks are run to execute maintenance functions, user requests, and other tasks that do not involve wafer processing in a process module.
Non-recipe tasks have been performed by following a fixed sequence of steps stored as static files. To purge a wafer from bake station 104, for example, purge sequence 113 shown in FIG. 1C is invoked from a static file. In accordance with purge sequence 113, a wafer to be purged from bake station 104 is first cooled in cooling station 102 before being placed in a cassette located in cassette station 101. Purge sequences for other modules of system 100 are also stored as static files. Similarly, static files for wafer reload are available for each module.
The amount of static files that have to be maintained becomes unwieldy as the number of modules supported by system 100 is increased. For example, a patch to fix a common defect will have to be applied to each individual static file containing the purge sequence. Forgetting to apply the patch to even a single static file, which is likely to happen if there are many, can result in the loss of expensive wafers. Further, maintenance personnel will have to familiarize themselves with a large number of static files.
Another problem with static files is that they are inherently inflexible. It is difficult to optimize the sequence contained in static files because the static files are created in advance and are designed to accommodate a variety of situations.
The present invention relates to a method and associated apparatus for directing the movement of wafers in a wafer processing system.
In one embodiment, each module of the wafer processing system is given a classification. Upon receipt of a request to move the wafer, a sequence enumerating the modules to be visited by the wafer before reaching its destination is created. The modules are added to the sequence based on their classification. The wafer is then worked on in each of the modules enumerated in the sequence.
By creating the sequence when needed, the present invention minimizes the number of static files that have to be maintained and stored in the wafer processing system. Further, creating the sequence at the time it is needed allows the sequence to take advantage of the history of the wafer and thereby eliminate unnecessary steps.
These and other features and advantages of the present invention will be readily apparent to persons of ordinary skill in the art upon reading the entirety of this disclosure, which includes the accompanying drawings.